Low-Power High-Speed Eight-Bit Universal Shift Register Design Using Clock Gating Technique

Low-Power High-Speed Eight-Bit Universal Shift Register Design Using Clock Gating Technique

Preeti Sahu
Copyright: © 2023 |Pages: 15
DOI: 10.4018/978-1-6684-4974-5.ch003
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Abstract

A register is basically known as a storage device for units in circuits. In data processing systems, they are used to immediately transfer data by using CPU. In digital electronics, shift registers are known as the sequential logic circuits that are used to store data temporally and transfer the data to its output for each and every clock pulse. Shift registers are found as digital memory unit storage in such devices as calculators, computers, etc. Based on shifting data, shift registers are classified in two types: universal shift register and bidirectional shift register. This chapter dealt with design and implementation of 8-bit universal shift register with CG scheme for minimizing power. Circuit operation is performed by Xilinx-14.7 software tool and simulated with I-SIM simulator tool using VHDL language. XPE tool is used to optimize power in the circuit. Results improved the power consumption in circuit by 40.65%. Also 4.76% of area was increased due to adding external circuitry and delay was reduced by 12.93% in the proposed design.
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Introduction

At now days VLSI has important role in many applications such as DSP, RF, communications network, microwave applications, MEMS, and Space application, Robotics etc. An electronic circuit that consist of elements, which may be a transistor, diodes or resistors combined in such a manner that they perform a logic operation called gate circuit which are known as basic building blocks of a digital system. There are 3 main parameters in VLSI digital design: Power, Area, and Delay. In this paper dynamic power reduction in 8-bit USR circuit is discussed. Generally power consumption is increased in the electronic system and the integrated circuits in particularly manner because of their complexity due to large number of circuits on a single chip. So, there is needed design a circuit with low power consumption. The optimization is described in terms of generating the best design according to goal. In VLSI system designing mostly three sources of power dissipation discussed namely as, Dynamic, or circuit-switching power, Static Power and Short- circuit Power. Dynamic power is a very simple approach to estimate energy consumption in a CMOS circuit (Sahu and Agrahari, n.d., 2021).

Dynamic power is caused by switching activities of the circuit. Increment of dynamic power in circuit is depends on the higher operating frequencies which leads more frequent switching activities in the circuit. Dynamic power of circuit is described as given expression, where energy consumption in CMOS circuits is estimated by the capacitance to be switched. The charging and discharging of capacitance is known as most significant source of dynamic power dissipation in VLSI circuits (Joshi and Jangir 2019).

Pd = C.V2.f

Static power is related to the changes in states of the circuits, means that the static power is due to the changing of circuit states that are 0 to 1 or 1 to 0 rather than switching activities. In CMOS circuit leakage power is only source of static power dissipation. Low power consideration should be applied in digital CMOS technology at all levels of design abstraction and design activities. A low power design system also affects other features such as reliability, design cycle time, testability and design complexity. Chip area and speed are the major trade off considerations in designing of VLSI system (Niranjan, n.d.; Sivakumar and Sowmya, 2016; K. Anusha and Deepika, 2016).

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