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TopInstruction Prefetching Techniques
The proliferation of handheld, mobile and ubiquitous devices, has led to the research boom on embedded systems. Various design issues and approaches have been proposed. Bisdikian et al. (1998) present an experimental platform to research technologies and applications that enable ubiquitous, environment-aware, and low-cost computing of handheld devices in the wireless personal access networks. Medvidovic et al. (2003) developed a software-architecture-based scheme to support distributed computation on handheld devices. Several power management schemes at the hardware level have also been proposed to reduce power consumption in different mobile system components such as the displayer (Min & Cha, 2007), the graphic processing unit (Nam, Lee, Kim, Lee, & Yoo, 2008).
Our proposal in this paper is an energy-efficient instruction prefetching scheme for embedded processors that can be used in the mobile/handheld devices for high system performance and low energy consumption. This section reviews some existing instruction prefetching methods for cache performance optimization.
Existing instruction prefetching techniques can be classified as software based prefetching and hardware based prefetching. Software prefetching schemes (Gornish, Granston, & Veidenbaum, 1990; Luk & Mowry, 1998; Cristal et al., 2005) rely on the compiler to insert prefetch instructions into the program code before the application is executed, which requires a known memory access behavior and a dedicated compiler.